1. Field of the Invention
The present invention relates to semiconductor industry, more particularly to reticles used in microlithography, and still more particularly to reticles with a thin film coating to isolate the mask from electric static field.
2. Description of the Related Art
A microlithography (or photolithography) process for manufacturing a semiconductor device comprises a photoresist application process, an exposure process, and a development process. During the photolithography process, semiconductor manufacturers often use a photomask to copy an image of an electronic circuit onto a semiconductor wafer. Photomasks come in various sizes and shapes such as 1X and 2X photomasks or 2X, 2.5X, 4X, and 5X reticles. Depending on the reduction factor X, line width and line space geometries for a resulting semiconductor device are from less than 10 microns to less than 2 microns. Other mask line spacings and semiconductor line spacings also can be achieved. When working with such small geometries, it is important that the reticle and other components in the fabrication processes be free of foreign particles. A tiny speck of dust alters the desired pattern to be imaged onto the wafer. Conventionally, a thin transparent membrane, referred to as a pellicle membrane, is applied over the photomask portion of the reticle to keep the photomask portion free of foreign particles. The pellicle membrane typically is positioned at a height above the photomask. Such height is greater than the focal length of the light imaged onto the photomask. Thus, small particles on the pellicle membrane will not block light from reaching the photomask.
Reticles are a type of photomask that can be shot several times onto a single wafer with a photolithographic tool known as a stepper or scanner. Photomasks generally include a fused silica (amorphous quartz) blank having a thin patterned opaque metal layer (e.g., chromium, or chrome) deposited on one surface of the blank. Typically, the layer is formed with chrome less than 100 nm thick and covered with an anti-reflective coating, such as chrome oxide. The purpose of the anti-reflective coating is to suppress ghost images from the light reflected by the opaque material. This patterned metal layer contains the microscopic image of the electronic circuit, which is frequently referred to as the photomask's geometry. The quality of this geometry will substantially dictate the quality of the electronic circuits formed on the semiconductor wafers from the photomask. As design rules have moved toward smaller and denser integrated circuit (IC) devices, the integrity of the photomask geometry has become increasingly important.
Due to specific conditions accompanying semiconductor-manufacturing process, namely low humidity (typically 40%±10% RH), it is especially prone to developing static electrical charges. Accumulated on the chrome, electrostatic charge leads to an uncontrolled electrostatic discharge (ESD), one of the key causes of geometry degradation. ESD is created when a force causes a charge imbalance among a photomask's chrome structures. In the photomask context, effects of ESD include material sputtering and material migration. Specifically, depositing its energy into a very small area of the wafer, ESD irreversibly damages the latter literally vaporizing metal conductor lines. Instances of these effects can result in the non-functioning of IC devices created from the degraded photomask. It is not surprising, therefore, that prior art presents a number of technical solutions addressing the ESD problem.
U.S. Pat. No. 5,989,754 issued to Chen et al. provides for a photomask arrangement to prevent reticle patterns of a photomask from peeling caused by electrostatic discharge damage. The photomask includes: a substrate; a plurality of metal shielding layers formed on the surface of the substrate to provide the reticle patterns, wherein each two of the metal shielding layers are spaced apart by a clear scribe line; and a plurality of chrome lines formed on the clear scribe line to connect the adjacent metal shielding layers, thereby increasing the effective surface area of the reticle patterns. Accordingly, when subjected to an accidental electrostatic discharge, the chrome lines act as paths for spreading the static charge from one of the chrome lines to the other.
In U.S. Pat. No. 6,309,781 issued to Gemmink et al., a photomask comprises a transmissive base plate, a first side of which is provided with a layer of a metallic mask material. In this layer, a mask pattern is formed, which is enclosed in an outer region of mask material. The photomask is encapsulated in a protection layer of transmissive and conductive material, which, on the first side of the base plate, is formed at such a distance from the first side that the protection layer remains free of the mask pattern. The photomask is thus protected against electrostatic discharges, which could damage the mask pattern, and the projection of the mask pattern is not adversely affected.
U.S. Pat. No. 6,359,313 issued to Yang et al. teaches an ESD protection transistor for discharging current from an ESD event present on an input/output pad. The ESD protection transistor is capable of improved discharging of excessive current without damage to the semiconductor device and to the ESD protection transistor itself. The ESD protection transistor includes a first conductive line connecting an input/output pad to the source and drain of the transistor at multiple points preventing the convergence of an excessive current at a certain point and ESD damage to the transistor. The transistor also includes a second conductive line formed on an insulating layer such that it does not overlap with the first conductive line.